Base Clock
From Wiki.cyring.fr
(Difference between revisions)
(Created page with "== How to read the Base Clock ==") |
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Line 1: | Line 1: | ||
- | == | + | == Source code to read the Base Clock of the ASUS Rampage II GENE == |
+ | |||
+ | <syntaxhighlight lang="c" line start="1"> | ||
+ | // bclk.c | ||
+ | #include | ||
+ | #include | ||
+ | #include | ||
+ | |||
+ | int bios_bclk() | ||
+ | { | ||
+ | int fd = -1; | ||
+ | ssize_t br = 1; | ||
+ | char buf[2]; | ||
+ | int clk = 0; | ||
+ | |||
+ | if( (fd = open("/dev/mem", O_RDONLY)) != -1 ) | ||
+ | { | ||
+ | if( (lseek(fd, 0xf08d9 + 0x12, SEEK_SET ) != -1) | ||
+ | && ((br = read(fd, buf, 2)) !=1) ) | ||
+ | clk = ((unsigned char) (buf[0])) + ((unsigned char) (buf[1] << 8)); | ||
+ | close(fd); | ||
+ | } | ||
+ | else | ||
+ | clk = 0; | ||
+ | |||
+ | return(clk); | ||
+ | } | ||
+ | |||
+ | int main(int argc, char **argv) | ||
+ | { | ||
+ | printf( "BCLK=%d MHzn", bios_bclk() ); | ||
+ | } | ||
+ | </syntaxhighlight> |
Revision as of 10:06, 6 April 2012
Source code to read the Base Clock of the ASUS Rampage II GENE
// bclk.c
#include
#include
#include
int bios_bclk()
{
int fd = -1;
ssize_t br = 1;
char buf[2];
int clk = 0;
if( (fd = open("/dev/mem", O_RDONLY)) != -1 )
{
if( (lseek(fd, 0xf08d9 + 0x12, SEEK_SET ) != -1)
&& ((br = read(fd, buf, 2)) !=1) )
clk = ((unsigned char) (buf[0])) + ((unsigned char) (buf[1] << 8));
close(fd);
}
else
clk = 0;
return(clk);
}
int main(int argc, char **argv)
{
printf( "BCLK=%d MHzn", bios_bclk() );
}