CoreMod
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==== Release 2012-0.1.2 ==== | ==== Release 2012-0.1.2 ==== | ||
===== coremod.h ===== | ===== coremod.h ===== | ||
+ | <syntaxhighlight lang="c" line start="1"> | ||
+ | /* | ||
+ | * CoreMod by CyrIng | ||
+ | * | ||
+ | * Copyright (C) 2012 CYRIL INGENIERIE | ||
+ | * | ||
+ | * Licenses: GPL2 | ||
+ | * | ||
+ | * coremod.h release 2012-0.1.2 | ||
+ | */ | ||
+ | |||
+ | |||
+ | // Intel® 64 and IA-32 Architectures Software Developer's Manual - Vol. 3C | ||
+ | // Table 34-5 (Nehalem) and 34-10 (Sandy Bridge) | ||
+ | |||
+ | #define IA32_PERF_STATUS 0x198 | ||
+ | #define IA32_THERM_STATUS 0x19c | ||
+ | #define MSR_TEMPERATURE_TARGET 0x1a2 | ||
+ | |||
+ | struct COREINFO | ||
+ | { | ||
+ | struct | ||
+ | { | ||
+ | unsigned long long | ||
+ | Ratio : 16-0, | ||
+ | ReservedBit1 : 32-16, | ||
+ | Voltage : 48-32, | ||
+ | ReservedBit2 : 64-48; | ||
+ | } Perf; | ||
+ | struct | ||
+ | { | ||
+ | unsigned long long | ||
+ | Status : 1-0, | ||
+ | StatusLog : 2-1, | ||
+ | PROCHOT : 3-2, | ||
+ | PROCHOTLog : 4-3, | ||
+ | CriticalTemp : 5-4, | ||
+ | CriticalTempLog : 6-5, | ||
+ | Threshold1 : 7-6, | ||
+ | Threshold1Log : 8-7, | ||
+ | Threshold2 : 9-8, | ||
+ | Threshold2Log : 10-9, | ||
+ | PowerLimit : 11-10, | ||
+ | PowerLimitLog : 12-11, | ||
+ | ReservedBit1 : 16-12, | ||
+ | DTS : 23-16, | ||
+ | ReservedBit2 : 27-23, | ||
+ | Resolution : 31-27, | ||
+ | ReadingValid : 32-31, | ||
+ | ReservedBit3 : 64-32; | ||
+ | } Therm; | ||
+ | struct | ||
+ | { | ||
+ | unsigned long long | ||
+ | ReservedBit1 : 16-0, | ||
+ | Target : 24-16, | ||
+ | ReservedBit2 : 64-24; | ||
+ | } Temp; | ||
+ | }; | ||
+ | |||
+ | |||
+ | // System Management BIOS (SMBIOS) Reference Specification | ||
+ | // Version: 2.7.1 § 7.5 | ||
+ | |||
+ | struct HEADER | ||
+ | { | ||
+ | unsigned int | ||
+ | Type : 8, | ||
+ | Lenght : 8, | ||
+ | Handle : 16; | ||
+ | }; | ||
+ | |||
+ | #define STRING_DELIMITER 0 | ||
+ | |||
+ | struct STRING | ||
+ | { | ||
+ | int ID; | ||
+ | char *Buffer; | ||
+ | struct STRING *Link; | ||
+ | }; | ||
+ | |||
+ | struct STRUCTINFO | ||
+ | { | ||
+ | struct HEADER Header; | ||
+ | unsigned int Dimension; | ||
+ | unsigned long long *Attrib; | ||
+ | struct STRING *String; | ||
+ | }; | ||
+ | |||
+ | struct PACKED | ||
+ | { | ||
+ | int Type; | ||
+ | int Instance; | ||
+ | FILE *File; | ||
+ | size_t Length; | ||
+ | int *Tape; | ||
+ | }; | ||
+ | |||
+ | #define _B_ 0 | ||
+ | #define _W_ 1 | ||
+ | #define _D_ 2 | ||
+ | #define _Q_ 3 | ||
+ | #define _S_ , | ||
+ | #define _EOT_ -1 | ||
+ | |||
+ | #define SMBIOS_BIOSINFO_TYPE 0 | ||
+ | #define SMBIOS_BIOSINFO_INSTANCE 0 | ||
+ | |||
+ | #define SMBIOS_BIOSINFO_PACKED {_B_ _S_ _B_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _Q_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _EOT_} | ||
+ | |||
+ | struct SMBIOS0 | ||
+ | { | ||
+ | unsigned long long | ||
+ | Vendor, | ||
+ | Version, | ||
+ | Address, | ||
+ | Release_Date, | ||
+ | ROM_Size, | ||
+ | Characteristics, | ||
+ | Extension_Bytes, | ||
+ | Major_Release, | ||
+ | Minor_Release, | ||
+ | Firmware_Major, | ||
+ | Firmware_Minor; | ||
+ | }; | ||
+ | |||
+ | struct BIOSINFO | ||
+ | { | ||
+ | struct HEADER Header; | ||
+ | unsigned int Dimension; | ||
+ | struct SMBIOS0 *Attrib; | ||
+ | struct STRING *String; | ||
+ | }; | ||
+ | |||
+ | |||
+ | #define SMBIOS_BOARDINFO_TYPE 2 | ||
+ | #define SMBIOS_BOARDINFO_INSTANCE 0 | ||
+ | /* | ||
+ | * Spec. for a multi motherboard | ||
+ | #define SMBIOS_BOARDINFO_PACKED {_B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _EOT_} | ||
+ | |||
+ | * The ASUS Rampage II Gene is a single motherboard | ||
+ | */ | ||
+ | #define SMBIOS_BOARDINFO_PACKED {_B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _EOT_} | ||
+ | #define SMBIOS_BOARDINFO_EXTENS {_W_ _S_ _EOT_} | ||
+ | |||
+ | struct SMBIOS2 | ||
+ | { | ||
+ | unsigned long long | ||
+ | Manufacturer, | ||
+ | Product, | ||
+ | Version, | ||
+ | Serial, | ||
+ | AssetTag, | ||
+ | Feature, | ||
+ | Location, | ||
+ | Chassis_Handle, | ||
+ | Board_Type, | ||
+ | Number_Object, | ||
+ | Object_Handles; | ||
+ | // Use Attrib[10] to Attrib[265] to read the list of the 255 object handles | ||
+ | }; | ||
+ | |||
+ | struct BOARDINFO | ||
+ | { | ||
+ | struct HEADER Header; | ||
+ | unsigned int Dimension; | ||
+ | struct SMBIOS2 *Attrib; | ||
+ | struct STRING *String; | ||
+ | }; | ||
+ | |||
+ | |||
+ | #define SMBIOS_PROCINFO_TYPE 4 | ||
+ | #define SMBIOS_PROCINFO_INSTANCE 0 | ||
+ | /* | ||
+ | * Spec. Version 2.6+ | ||
+ | #define SMBIOS_PROCINFO_PACKED {_B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _Q_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _EOT_} | ||
+ | |||
+ | * The SMBIOS version of the ASUS Rampage II Gene is a 2.5 | ||
+ | */ | ||
+ | #define SMBIOS_PROCINFO_PACKED {_B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _Q_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _EOT_} | ||
+ | #define SMBIOS_PROCINFO_EXTENS {_W_ _S_ _EOT_} | ||
+ | |||
+ | struct SMBIOS4 | ||
+ | { | ||
+ | unsigned long long | ||
+ | Socket, | ||
+ | ProcType, | ||
+ | Family, | ||
+ | Manufacturer; | ||
+ | struct | ||
+ | { | ||
+ | unsigned | ||
+ | EAX : 32-0; | ||
+ | struct | ||
+ | { | ||
+ | unsigned | ||
+ | Unused1 : 9-0, | ||
+ | APIC : 10-9, | ||
+ | Unused2 : 12-10, | ||
+ | MTRR : 13-12, | ||
+ | Unused3 : 16-13, | ||
+ | PAT : 17-16, | ||
+ | Unused4 : 23-17, | ||
+ | MMX : 24-23, | ||
+ | Unused5 : 25-24, | ||
+ | SSE : 26-25, | ||
+ | SSE2 : 27-26, | ||
+ | Unused6 : 28-27, | ||
+ | HyperThreading : 29-28, | ||
+ | Unused7 : 32-29; | ||
+ | } EDX; | ||
+ | } CPUID; | ||
+ | unsigned long long | ||
+ | Version; | ||
+ | struct | ||
+ | { | ||
+ | unsigned | ||
+ | Tension : 7-0, | ||
+ | Mode : 8-7; | ||
+ | } Voltage; | ||
+ | unsigned long long | ||
+ | Clock, | ||
+ | MaxSpeed, | ||
+ | CurrentSpeed, | ||
+ | Status, | ||
+ | Upgrade, | ||
+ | L1_Cache_Handle, | ||
+ | L2_Cache_Handle, | ||
+ | L3_Cache_Handle, | ||
+ | Serial, | ||
+ | AssetTag, | ||
+ | PartNumber, | ||
+ | CoreCount, | ||
+ | CoreEnabled, | ||
+ | ThreadCount, | ||
+ | Characteristics, | ||
+ | Family2; | ||
+ | }; | ||
+ | |||
+ | struct PROCINFO | ||
+ | { | ||
+ | struct HEADER Header; | ||
+ | unsigned int Dimension; | ||
+ | struct SMBIOS4 *Attrib; | ||
+ | struct STRING *String; | ||
+ | }; | ||
+ | |||
+ | |||
+ | #define SMBIOS_CACHEINFO_TYPE 7 | ||
+ | |||
+ | #define SMBIOS_CACHEINFO_PACKED {_B_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _EOT_} | ||
+ | |||
+ | struct SMBIOS7 | ||
+ | { | ||
+ | unsigned long long | ||
+ | Socket, | ||
+ | Configuration, | ||
+ | Maximum_Size, | ||
+ | Installed_Size, | ||
+ | Supported_SRAM, | ||
+ | Current_SRAM, | ||
+ | Cache_Speed, | ||
+ | Error_Correction, | ||
+ | System_Cache, | ||
+ | Associativity; | ||
+ | }; | ||
+ | |||
+ | struct CACHEINFO | ||
+ | { | ||
+ | struct HEADER Header; | ||
+ | unsigned int Dimension; | ||
+ | struct SMBIOS7 *Attrib; | ||
+ | struct STRING *String; | ||
+ | }; | ||
+ | |||
+ | |||
+ | #define SMBIOS_MEMARRAY_TYPE 16 | ||
+ | #define SMBIOS_MEMARRAY_INSTANCE 0 | ||
+ | |||
+ | #define SMBIOS_MEMARRAY_PACKED {_B_ _S_ _B_ _S_ _B_ _S_ _D_ _S_ _W_ _S_ _W_ _S_ _EOT_} | ||
+ | #define SMBIOS_MEMARRAY_EXTENS {_Q_ _S_ _EOT_} | ||
+ | |||
+ | struct SMBIOS16 | ||
+ | { | ||
+ | unsigned long long | ||
+ | Location, | ||
+ | Use, | ||
+ | Error_Correction, | ||
+ | Maximum_Capacity, | ||
+ | Error_Handle, | ||
+ | Number_Devices, | ||
+ | Extended_Capacity; | ||
+ | }; | ||
+ | |||
+ | struct MEMARRAY | ||
+ | { | ||
+ | struct HEADER Header; | ||
+ | unsigned int Dimension; | ||
+ | struct SMBIOS16 *Attrib; | ||
+ | struct STRING *String; | ||
+ | }; | ||
+ | |||
+ | |||
+ | #define SMBIOS_MEMDEV_TYPE 17 | ||
+ | |||
+ | #define SMBIOS_MEMDEV_PACKED {_W_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _EOT_} | ||
+ | #define SMBIOS_MEMDEV_EXTENS {_B_ _S_ _D_ _S_ _W_ _S_ _EOT_} | ||
+ | |||
+ | struct SMBIOS17 | ||
+ | { | ||
+ | unsigned long long | ||
+ | MemArray_Handle, | ||
+ | Error_Handle, | ||
+ | Total_Width, | ||
+ | Data_Width, | ||
+ | Size, | ||
+ | Form_Factor, | ||
+ | Set, | ||
+ | Socket, | ||
+ | Bank, | ||
+ | Mem_Type, | ||
+ | Mem_Detail, | ||
+ | Speed, | ||
+ | Manufacturer, | ||
+ | Serial, | ||
+ | AssetTag, | ||
+ | PartNumber, | ||
+ | Attributes, | ||
+ | Extended_Size, | ||
+ | Clock_Speed; | ||
+ | }; | ||
+ | |||
+ | struct MEMDEV | ||
+ | { | ||
+ | struct HEADER Header; | ||
+ | unsigned int Dimension; | ||
+ | struct SMBIOS17 *Attrib; | ||
+ | struct STRING *String; | ||
+ | }; | ||
+ | |||
+ | |||
+ | struct MENUNAV | ||
+ | { | ||
+ | char Command; | ||
+ | int NewLevel; | ||
+ | int Function; | ||
+ | }; | ||
+ | |||
+ | #define LEVELS 11 | ||
+ | #define CHARS 66 | ||
+ | |||
+ | #define MENU_LABEL_ROOT " Root " | ||
+ | #define MENU_LABEL_HELP " Help " | ||
+ | #define MENU_LABEL_SHOW " Show " | ||
+ | #define MENU_LABEL_DUMP " Dump " | ||
+ | #define MENU_LABEL_ATTR "Attribs" | ||
+ | #define MENU_LABEL_STRG "Strings" | ||
+ | #define MENU_LABEL_CACH " Cache " | ||
+ | #define MENU_LABEL_MEMY " Memory" | ||
+ | #define MENU_LABEL_CMOD " Modify" | ||
+ | |||
+ | #define MENU_PROMPT_ROOT "[E]xit [H]elp [S]how [D]ump [M]odify " | ||
+ | #define MENU_PROMPT_HELP "[<]Back (C)2012 CyrIng " | ||
+ | #define MENU_PROMPT_SHOW "[<]Back [C]ore [P]rocessor [S]ystem " | ||
+ | #define MENU_PROMPT_DUMP "[<]Back [A]ttributes [S]trings " | ||
+ | #define MENU_PROMPT_ATTR "[<]Back [B]ios [M]otherboard [P]rocessor [C]ache [R]AM" | ||
+ | #define MENU_PROMPT_STRG "[<]Back [B]ios [M]otherboard [P]rocessor [C]ache [R]AM" | ||
+ | #define MENU_PROMPT_CACH "[<]Back Level L[1] Level L[2] Level L[3] " | ||
+ | #define MENU_PROMPT_MEMY "[<]Back [A]rray " | ||
+ | #define MENU_PROMPT_CMOD "[<]Back MOD is coming, hope so! " | ||
+ | |||
+ | #define LV_ROOT 0 | ||
+ | #define LV_HELP 1 | ||
+ | #define LV_SHOW 2 | ||
+ | #define LV_DUMP 3 | ||
+ | #define LV_ATTR 4 | ||
+ | #define LV_STRG 5 | ||
+ | #define LV_ATTH 6 | ||
+ | #define LV_STRH 7 | ||
+ | #define LV_ATTY 8 | ||
+ | #define LV_STRY 9 | ||
+ | #define LV_CMOD 10 | ||
+ | |||
+ | #define FN_EXIT 0 | ||
+ | #define FN_NOOP -1 | ||
+ | #define FN_HELP 1 | ||
+ | #define FN_SHWC 21 | ||
+ | #define FN_SHWP 22 | ||
+ | #define FN_SHWS 23 | ||
+ | #define FN_ATTB 41 | ||
+ | #define FN_ATTM 42 | ||
+ | #define FN_ATTP 43 | ||
+ | #define FN_STRB 51 | ||
+ | #define FN_STRM 52 | ||
+ | #define FN_STRP 53 | ||
+ | #define FN_ATL1 61 | ||
+ | #define FN_ATL2 62 | ||
+ | #define FN_ATL3 63 | ||
+ | #define FN_STL1 71 | ||
+ | #define FN_STL2 72 | ||
+ | #define FN_STL3 73 | ||
+ | #define FN_ATTY 81 | ||
+ | #define FN_STRY 91 | ||
+ | #define FN_ATTD 810 | ||
+ | #define FN_STRD 910 | ||
+ | |||
+ | #define EOL 0 | ||
+ | |||
+ | #define MENU_LEVEL_ROOT {{'e', LV_ROOT, FN_EXIT}, {'h', LV_HELP, FN_HELP}, {'s', LV_SHOW, FN_NOOP}, {'d', LV_DUMP, FN_NOOP}, {'m', LV_CMOD, FN_NOOP}, {EOL, LV_ROOT, FN_NOOP}} | ||
+ | #define MENU_LEVEL_HELP {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ROOT, FN_NOOP}, {EOL, LV_HELP, FN_NOOP}} | ||
+ | #define MENU_LEVEL_SHOW {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ROOT, FN_NOOP}, {'c', LV_SHOW, FN_SHWC}, {'p', LV_SHOW, FN_SHWP}, {'s', LV_SHOW, FN_SHWS}, {EOL, LV_SHOW, FN_NOOP}} | ||
+ | #define MENU_LEVEL_DUMP {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ROOT, FN_NOOP}, {'a', LV_ATTR, FN_NOOP}, {'s', LV_STRG, FN_NOOP}, {EOL, LV_DUMP, FN_NOOP}} | ||
+ | #define MENU_LEVEL_ATTR {{'e', LV_ROOT, FN_EXIT}, {'<', LV_DUMP, FN_NOOP}, {'b', LV_ATTR, FN_ATTB}, {'m', LV_ATTR, FN_ATTM}, {'p', LV_ATTR, FN_ATTP}, {'c', LV_ATTH, FN_NOOP}, {'r', LV_ATTY, FN_NOOP}, {EOL, LV_ATTR, FN_NOOP}} | ||
+ | #define MENU_LEVEL_STRG {{'e', LV_ROOT, FN_EXIT}, {'<', LV_DUMP, FN_NOOP}, {'b', LV_STRG, FN_STRB}, {'m', LV_STRG, FN_STRM}, {'p', LV_STRG, FN_STRP}, {'c', LV_STRH, FN_NOOP}, {'r', LV_STRY, FN_NOOP}, {EOL, LV_STRG, FN_NOOP}} | ||
+ | #define MENU_LEVEL_ATTH {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ATTR, FN_NOOP}, {'1', LV_ATTH, FN_ATL1}, {'2', LV_ATTH, FN_ATL2}, {'3', LV_ATTH, FN_ATL3}, {EOL, LV_ATTH, FN_NOOP}} | ||
+ | #define MENU_LEVEL_STRH {{'e', LV_ROOT, FN_EXIT}, {'<', LV_STRG, FN_NOOP}, {'1', LV_STRH, FN_STL1}, {'2', LV_STRH, FN_STL2}, {'3', LV_STRH, FN_STL3}, {EOL, LV_STRH, FN_NOOP}} | ||
+ | #define MENU_LEVEL_ATTY {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ATTR, FN_NOOP}, {'a', LV_ATTY, FN_ATTY}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}} | ||
+ | #define MENU_LEVEL_STRY {{'e', LV_ROOT, FN_EXIT}, {'<', LV_STRG, FN_NOOP}, {'a', LV_STRY, FN_STRY}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}} | ||
+ | #define MENU_LEVEL_CMOD {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ROOT, FN_NOOP}, {EOL, LV_CMOD, FN_NOOP}} | ||
+ | |||
+ | #define Menu_Display(runLevel) printf("\n%7s | %66s :", menuLabel[runLevel], menuPrompt[runLevel]) | ||
+ | |||
+ | </syntaxhighlight> | ||
+ | |||
===== coremod.c ===== | ===== coremod.c ===== | ||
==== Release 2012-0.1.1 ==== | ==== Release 2012-0.1.1 ==== |
Revision as of 21:20, 9 July 2012
Contents |
How To
Requirements
Mandatory,
- The GNU/Linux x86_64 3.x : linux
- The GNU Compiler Collection: gcc - or - The C language family frontend for LLVM: clang
- Being root !
- The Intel(R) Core(TM) i7, i5 Processors
Optionally,
- The GNU Debugger: gdb
- and a graphical front-end for gdb: ddd
- The Intel 64 and IA-32 Architectures Software Developer’s Manual Volume 3
- The SMBIOS Reference Specification (C) Distributed Management Task Force
Compiling
$ gcc coremod.c -o coremod
- or -
$ clang coremod.c -o coremod
Debugging
First of all, compile sources with the -g switch then launch the debugger
$ kdesu ddd ./coremod
Usage
Two kernel modules must be loaded
- msr
- dmi-sysfs
Execute CoreMod as root
# ./coremod
Usage is straightforward. Just enter the corresponding initial character to the function you want to execute.
Thus to show the core temperature, press the following keys:
- [s]
- [Enter]
- [c]
- [Enter]
And for instance to go back to previous menu level:
- [<]
- [Enter]
Discover the other functions to dump your components !
Contact
Feel free to contact us for any suggestion or question.
Releases
Release 2012-0.1.2
coremod.h
/*
* CoreMod by CyrIng
*
* Copyright (C) 2012 CYRIL INGENIERIE
*
* Licenses: GPL2
*
* coremod.h release 2012-0.1.2
*/
// Intel® 64 and IA-32 Architectures Software Developer's Manual - Vol. 3C
// Table 34-5 (Nehalem) and 34-10 (Sandy Bridge)
#define IA32_PERF_STATUS 0x198
#define IA32_THERM_STATUS 0x19c
#define MSR_TEMPERATURE_TARGET 0x1a2
struct COREINFO
{
struct
{
unsigned long long
Ratio : 16-0,
ReservedBit1 : 32-16,
Voltage : 48-32,
ReservedBit2 : 64-48;
} Perf;
struct
{
unsigned long long
Status : 1-0,
StatusLog : 2-1,
PROCHOT : 3-2,
PROCHOTLog : 4-3,
CriticalTemp : 5-4,
CriticalTempLog : 6-5,
Threshold1 : 7-6,
Threshold1Log : 8-7,
Threshold2 : 9-8,
Threshold2Log : 10-9,
PowerLimit : 11-10,
PowerLimitLog : 12-11,
ReservedBit1 : 16-12,
DTS : 23-16,
ReservedBit2 : 27-23,
Resolution : 31-27,
ReadingValid : 32-31,
ReservedBit3 : 64-32;
} Therm;
struct
{
unsigned long long
ReservedBit1 : 16-0,
Target : 24-16,
ReservedBit2 : 64-24;
} Temp;
};
// System Management BIOS (SMBIOS) Reference Specification
// Version: 2.7.1 § 7.5
struct HEADER
{
unsigned int
Type : 8,
Lenght : 8,
Handle : 16;
};
#define STRING_DELIMITER 0
struct STRING
{
int ID;
char *Buffer;
struct STRING *Link;
};
struct STRUCTINFO
{
struct HEADER Header;
unsigned int Dimension;
unsigned long long *Attrib;
struct STRING *String;
};
struct PACKED
{
int Type;
int Instance;
FILE *File;
size_t Length;
int *Tape;
};
#define _B_ 0
#define _W_ 1
#define _D_ 2
#define _Q_ 3
#define _S_ ,
#define _EOT_ -1
#define SMBIOS_BIOSINFO_TYPE 0
#define SMBIOS_BIOSINFO_INSTANCE 0
#define SMBIOS_BIOSINFO_PACKED {_B_ _S_ _B_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _Q_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _EOT_}
struct SMBIOS0
{
unsigned long long
Vendor,
Version,
Address,
Release_Date,
ROM_Size,
Characteristics,
Extension_Bytes,
Major_Release,
Minor_Release,
Firmware_Major,
Firmware_Minor;
};
struct BIOSINFO
{
struct HEADER Header;
unsigned int Dimension;
struct SMBIOS0 *Attrib;
struct STRING *String;
};
#define SMBIOS_BOARDINFO_TYPE 2
#define SMBIOS_BOARDINFO_INSTANCE 0
/*
* Spec. for a multi motherboard
#define SMBIOS_BOARDINFO_PACKED {_B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _EOT_}
* The ASUS Rampage II Gene is a single motherboard
*/
#define SMBIOS_BOARDINFO_PACKED {_B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _EOT_}
#define SMBIOS_BOARDINFO_EXTENS {_W_ _S_ _EOT_}
struct SMBIOS2
{
unsigned long long
Manufacturer,
Product,
Version,
Serial,
AssetTag,
Feature,
Location,
Chassis_Handle,
Board_Type,
Number_Object,
Object_Handles;
// Use Attrib[10] to Attrib[265] to read the list of the 255 object handles
};
struct BOARDINFO
{
struct HEADER Header;
unsigned int Dimension;
struct SMBIOS2 *Attrib;
struct STRING *String;
};
#define SMBIOS_PROCINFO_TYPE 4
#define SMBIOS_PROCINFO_INSTANCE 0
/*
* Spec. Version 2.6+
#define SMBIOS_PROCINFO_PACKED {_B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _Q_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _EOT_}
* The SMBIOS version of the ASUS Rampage II Gene is a 2.5
*/
#define SMBIOS_PROCINFO_PACKED {_B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _Q_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _EOT_}
#define SMBIOS_PROCINFO_EXTENS {_W_ _S_ _EOT_}
struct SMBIOS4
{
unsigned long long
Socket,
ProcType,
Family,
Manufacturer;
struct
{
unsigned
EAX : 32-0;
struct
{
unsigned
Unused1 : 9-0,
APIC : 10-9,
Unused2 : 12-10,
MTRR : 13-12,
Unused3 : 16-13,
PAT : 17-16,
Unused4 : 23-17,
MMX : 24-23,
Unused5 : 25-24,
SSE : 26-25,
SSE2 : 27-26,
Unused6 : 28-27,
HyperThreading : 29-28,
Unused7 : 32-29;
} EDX;
} CPUID;
unsigned long long
Version;
struct
{
unsigned
Tension : 7-0,
Mode : 8-7;
} Voltage;
unsigned long long
Clock,
MaxSpeed,
CurrentSpeed,
Status,
Upgrade,
L1_Cache_Handle,
L2_Cache_Handle,
L3_Cache_Handle,
Serial,
AssetTag,
PartNumber,
CoreCount,
CoreEnabled,
ThreadCount,
Characteristics,
Family2;
};
struct PROCINFO
{
struct HEADER Header;
unsigned int Dimension;
struct SMBIOS4 *Attrib;
struct STRING *String;
};
#define SMBIOS_CACHEINFO_TYPE 7
#define SMBIOS_CACHEINFO_PACKED {_B_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _EOT_}
struct SMBIOS7
{
unsigned long long
Socket,
Configuration,
Maximum_Size,
Installed_Size,
Supported_SRAM,
Current_SRAM,
Cache_Speed,
Error_Correction,
System_Cache,
Associativity;
};
struct CACHEINFO
{
struct HEADER Header;
unsigned int Dimension;
struct SMBIOS7 *Attrib;
struct STRING *String;
};
#define SMBIOS_MEMARRAY_TYPE 16
#define SMBIOS_MEMARRAY_INSTANCE 0
#define SMBIOS_MEMARRAY_PACKED {_B_ _S_ _B_ _S_ _B_ _S_ _D_ _S_ _W_ _S_ _W_ _S_ _EOT_}
#define SMBIOS_MEMARRAY_EXTENS {_Q_ _S_ _EOT_}
struct SMBIOS16
{
unsigned long long
Location,
Use,
Error_Correction,
Maximum_Capacity,
Error_Handle,
Number_Devices,
Extended_Capacity;
};
struct MEMARRAY
{
struct HEADER Header;
unsigned int Dimension;
struct SMBIOS16 *Attrib;
struct STRING *String;
};
#define SMBIOS_MEMDEV_TYPE 17
#define SMBIOS_MEMDEV_PACKED {_W_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _W_ _S_ _W_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _B_ _S_ _EOT_}
#define SMBIOS_MEMDEV_EXTENS {_B_ _S_ _D_ _S_ _W_ _S_ _EOT_}
struct SMBIOS17
{
unsigned long long
MemArray_Handle,
Error_Handle,
Total_Width,
Data_Width,
Size,
Form_Factor,
Set,
Socket,
Bank,
Mem_Type,
Mem_Detail,
Speed,
Manufacturer,
Serial,
AssetTag,
PartNumber,
Attributes,
Extended_Size,
Clock_Speed;
};
struct MEMDEV
{
struct HEADER Header;
unsigned int Dimension;
struct SMBIOS17 *Attrib;
struct STRING *String;
};
struct MENUNAV
{
char Command;
int NewLevel;
int Function;
};
#define LEVELS 11
#define CHARS 66
#define MENU_LABEL_ROOT " Root "
#define MENU_LABEL_HELP " Help "
#define MENU_LABEL_SHOW " Show "
#define MENU_LABEL_DUMP " Dump "
#define MENU_LABEL_ATTR "Attribs"
#define MENU_LABEL_STRG "Strings"
#define MENU_LABEL_CACH " Cache "
#define MENU_LABEL_MEMY " Memory"
#define MENU_LABEL_CMOD " Modify"
#define MENU_PROMPT_ROOT "[E]xit [H]elp [S]how [D]ump [M]odify "
#define MENU_PROMPT_HELP "[<]Back (C)2012 CyrIng "
#define MENU_PROMPT_SHOW "[<]Back [C]ore [P]rocessor [S]ystem "
#define MENU_PROMPT_DUMP "[<]Back [A]ttributes [S]trings "
#define MENU_PROMPT_ATTR "[<]Back [B]ios [M]otherboard [P]rocessor [C]ache [R]AM"
#define MENU_PROMPT_STRG "[<]Back [B]ios [M]otherboard [P]rocessor [C]ache [R]AM"
#define MENU_PROMPT_CACH "[<]Back Level L[1] Level L[2] Level L[3] "
#define MENU_PROMPT_MEMY "[<]Back [A]rray "
#define MENU_PROMPT_CMOD "[<]Back MOD is coming, hope so! "
#define LV_ROOT 0
#define LV_HELP 1
#define LV_SHOW 2
#define LV_DUMP 3
#define LV_ATTR 4
#define LV_STRG 5
#define LV_ATTH 6
#define LV_STRH 7
#define LV_ATTY 8
#define LV_STRY 9
#define LV_CMOD 10
#define FN_EXIT 0
#define FN_NOOP -1
#define FN_HELP 1
#define FN_SHWC 21
#define FN_SHWP 22
#define FN_SHWS 23
#define FN_ATTB 41
#define FN_ATTM 42
#define FN_ATTP 43
#define FN_STRB 51
#define FN_STRM 52
#define FN_STRP 53
#define FN_ATL1 61
#define FN_ATL2 62
#define FN_ATL3 63
#define FN_STL1 71
#define FN_STL2 72
#define FN_STL3 73
#define FN_ATTY 81
#define FN_STRY 91
#define FN_ATTD 810
#define FN_STRD 910
#define EOL 0
#define MENU_LEVEL_ROOT {{'e', LV_ROOT, FN_EXIT}, {'h', LV_HELP, FN_HELP}, {'s', LV_SHOW, FN_NOOP}, {'d', LV_DUMP, FN_NOOP}, {'m', LV_CMOD, FN_NOOP}, {EOL, LV_ROOT, FN_NOOP}}
#define MENU_LEVEL_HELP {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ROOT, FN_NOOP}, {EOL, LV_HELP, FN_NOOP}}
#define MENU_LEVEL_SHOW {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ROOT, FN_NOOP}, {'c', LV_SHOW, FN_SHWC}, {'p', LV_SHOW, FN_SHWP}, {'s', LV_SHOW, FN_SHWS}, {EOL, LV_SHOW, FN_NOOP}}
#define MENU_LEVEL_DUMP {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ROOT, FN_NOOP}, {'a', LV_ATTR, FN_NOOP}, {'s', LV_STRG, FN_NOOP}, {EOL, LV_DUMP, FN_NOOP}}
#define MENU_LEVEL_ATTR {{'e', LV_ROOT, FN_EXIT}, {'<', LV_DUMP, FN_NOOP}, {'b', LV_ATTR, FN_ATTB}, {'m', LV_ATTR, FN_ATTM}, {'p', LV_ATTR, FN_ATTP}, {'c', LV_ATTH, FN_NOOP}, {'r', LV_ATTY, FN_NOOP}, {EOL, LV_ATTR, FN_NOOP}}
#define MENU_LEVEL_STRG {{'e', LV_ROOT, FN_EXIT}, {'<', LV_DUMP, FN_NOOP}, {'b', LV_STRG, FN_STRB}, {'m', LV_STRG, FN_STRM}, {'p', LV_STRG, FN_STRP}, {'c', LV_STRH, FN_NOOP}, {'r', LV_STRY, FN_NOOP}, {EOL, LV_STRG, FN_NOOP}}
#define MENU_LEVEL_ATTH {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ATTR, FN_NOOP}, {'1', LV_ATTH, FN_ATL1}, {'2', LV_ATTH, FN_ATL2}, {'3', LV_ATTH, FN_ATL3}, {EOL, LV_ATTH, FN_NOOP}}
#define MENU_LEVEL_STRH {{'e', LV_ROOT, FN_EXIT}, {'<', LV_STRG, FN_NOOP}, {'1', LV_STRH, FN_STL1}, {'2', LV_STRH, FN_STL2}, {'3', LV_STRH, FN_STL3}, {EOL, LV_STRH, FN_NOOP}}
#define MENU_LEVEL_ATTY {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ATTR, FN_NOOP}, {'a', LV_ATTY, FN_ATTY}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}, {EOL, LV_ATTY, FN_NOOP}}
#define MENU_LEVEL_STRY {{'e', LV_ROOT, FN_EXIT}, {'<', LV_STRG, FN_NOOP}, {'a', LV_STRY, FN_STRY}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}, {EOL, LV_STRY, FN_NOOP}}
#define MENU_LEVEL_CMOD {{'e', LV_ROOT, FN_EXIT}, {'<', LV_ROOT, FN_NOOP}, {EOL, LV_CMOD, FN_NOOP}}
#define Menu_Display(runLevel) printf("\n%7s | %66s :", menuLabel[runLevel], menuPrompt[runLevel])
coremod.c
Release 2012-0.1.1
coremod.c
// coremod.c - CyrIng 2012
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <sys/stat.h>
#include <fcntl.h>
// Intel® 64 and IA-32 Architectures Software Developer’s Manual
// Vol. 3C § 34-1
// Table 34-2. IA-32 Architectural MSRs
#define IA32_PERF_STATUS 0x198
// System Management BIOS (SMBIOS) Reference Specification
// Version: 2.7.1 § 7.5
// Table 20 – Processor Information (Type 4) Structure
#define SMBIOS_PROCINFO_STRUCTURE 4
#define SMBIOS_PROCINFO_INSTANCE 0
#define SMBIOS_PROCINFO_EXTCLK 0x12
int Read_MSR(int cpu, off_t offset, unsigned long long *msr) {
ssize_t retval=0;
char pathname[32]="";
int fd=0, rc=-1;
sprintf(pathname, "/dev/cpu/%d/msr", cpu);
if( (fd=open(pathname, O_RDONLY)) != -1 ) {
retval=pread(fd, msr, sizeof *msr, offset);
close(fd);
rc=(retval != sizeof *msr) ? -1 : 0;
}
return(rc);
}
int Read_SMBIOS(int structure, int instance, off_t offset, void *buf, size_t nbyte) {
ssize_t retval=0;
char pathname[]="/sys/firmware/dmi/entries/999-99/raw";
int fd=0, rc=-1;
sprintf(pathname, "/sys/firmware/dmi/entries/%d-%d/raw", structure, instance);
if( (fd=open(pathname, O_RDONLY)) != -1 ) {
retval=pread(fd, buf, nbyte, offset);
close(fd);
rc=(retval != nbyte) ? -1 : 0;
}
return(rc);
}
int Get_Ratio(int target) {
unsigned long long msr=0;
if( Read_MSR(target, IA32_PERF_STATUS, &msr) != -1)
return((int) msr);
else
return(0);
}
int External_Clock() {
int clock=0;
if( Read_SMBIOS(SMBIOS_PROCINFO_STRUCTURE, SMBIOS_PROCINFO_INSTANCE, SMBIOS_PROCINFO_EXTCLK, &clock, 1) != -1)
return(clock);
else
return(0);
}
int main(int argc, char *argv[]) {
int target=0, first=0, last=0, clock=0, ratio=0, rc=0;
switch(argc) {
case 2: first = atoi(argv[1]);
last = first;
break;
case 3: first = atoi(argv[1]);
last = atoi(argv[2]);
break;
}
if((clock=External_Clock())!=0)
for(target=first; target<=last && (ratio=Get_Ratio(target)) != 0; target++)
printf("Processor#%d : Ratio[%d] x Clock[%d] = %d Mhz\n", target, ratio, clock, ratio*clock);
else
rc=-1;
return(rc);
}